This invention relates to semiconductor memory devices, and more particularly to bulk memories using multiple non-diced wafers of semiconductor memory units integrated as a single structure.
High density memory systems have been proposed which use so-called "wafer scale" integration, i.e., whole wafers are left intact rather than being broken into individual chips. One example was a construction proposed by Trilogy Corporation, in which chips which tested good in a wafer were interconnected with additional discrete wiring; this approach presented technical difficulties associated with the discrete wiring, resulting in poor yields and thus high cost. Another approach was proposed by Anamartic, Ltd. of Cambridge, U.K., in which DRAM chips were used while still in wafer form and the good chips were interconnected using a software mapping scheme to block out the bad chips, with two whole wafers being placed back-to-back on a PC board; a serial access through all intermediate chips was used, however, and the unit was thus slow because of the long paths. A different approach was proposed by Mass Memory Technology of Scots Valley, Calif., in which whole wafers of DRAMs using serial access were employed, with interconnection between wafers provided by through-holes etched into the wafers; bundles of gold wires were threaded through the holes to make vertical interconnections, thus allowing wafers to be stacked one on top of the other, producing very high packing density. The gold wires used in the Mass Memory approach were pliable and could accommodate relative motion of the wafers due to variable thermal expansion. However, this method using gold wires required substantial additional wafer processing, involving sequential insertion of the wires using automated equipment, and so the cost was prohibitive.
The cost of a memory unit such as a 16-Mbit DRAM, while still in wafer form, is much less than that of a mounted and packaged chip containing the same memory unit. If these semiconductor memory units could be packaged and used in wafer form, and reliable and inexpensive interconnections made, then a very low cost bulk memory system could be manufactured, providing advantages over hard disk technology. A semiconductor bulk memory constructed in this manner would be orders of magnitude faster than hard disk, and would be more reliable because no moving parts are used.
It is the principal object of this invention to provide a low-cost semiconductor memory construction, particularly a memory system using wafer scale integration of memory units. Another object is to provide an improved method of interconnecting memory units in a wafer, and interconnecting wafers, in a stacked wafer construction of a memory system. Another object is to provide an improved data storage system employing serial DRAMs in a stacked wafer arrangement. A further object is to provide a method of making vertical interconnections in a stacked wafer semiconductor device. An additional object is to provide an improvement in low cost memory construction.